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rev.3.00 jul. 02, 2004 page 1 of 12 hd74lvc1g53 2?channel analog multiplexer/demultiplexer rej03d0155?0300z rev.3.00 jul. 02, 2004 description the hd74lvc1g53 has 2?channel analog multiplexer/demultiplexer in a 6-pin package. applications include signal gating chopping, modulation or demodul ation (modem), and signal multiplexing for analog to digital to analog conversion systems. low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life. features ? the basic gate function is lined up as renesas uni logic series. ? supply voltage range: 1.65 to 5.5 v operating temperature range: ?40 to +85c ? control input: v ih (max.) = 5.5 v (@v cc = 0 v to 5.5 v) ? ordering information part name package type package code package abbreviation taping abbreviation (quantity) HD74LVC1G53CPE tbs-6v cp hd74lvc1g53cle wcsp-6 pin tbs-6av cl e (3,000 pcs/reel) article indication k p y m marking year code month code function table control on channel 1 ly 0 hy 1 h: high level l: low level package type package code package abbreviation tbs-6v cp tbs-6av cl k p y m marking
hd74lvc1g53 rev.3.00 jul. 02, 2004 page 2 of 12 pin arrangement (bottom view) (top view) com 16 2 34 y 0 height 0.5 mm 0.5 mm pitch 0.17 mm 6?ball (cp) 0.23 mm 6?ball (cl) 0.9 mm 1.4 mm gnd v cc y 1 a 5 pin#1 index logic diagram y 1 a 1 6 y 0 34 (top view) y 0 34 34 34 34 34 34
hd74lvc1g53 rev.3.00 jul. 02, 2004 page 3 of 12 absolute maximum ratings item symbol ratings unit test conditions supply voltage range v cc ?0.5 to 6.5 v input voltage range *1 v i ?0.5 to 6.5 v output voltage range *1, 2 v o ?0.5 to v cc +0.5 v output : h or l control input clamp current i ik ?50 ma v i < 0 output clamp current i ok 50 ma v o < 0 or v o > v cc continuous output current i o 50 ma v o = 0 to v cc continuous current through v cc or gnd i cc or i gnd 100 ma 143 cp package thermal impedance ja 123 c/w cl storage temperature tstg ?65 to 150 c notes: the absolute maximum ratings are values, which must not individually be exceeded, and furthermore no two of which may be realized at the same time. 1. the input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. this value is limited to 5.5 v maximum. recommended operating conditions item symbol min max unit conditions supply voltage range v cc 1.65 5.5 v control input voltage range v i 05 . 5v input/output voltage range v i/o 0v cc v 02 0 v cc = 1.65 to 1.95 v, 2.3 to 2.7 v 01 0 v cc = 3.0 to 3.6 v input transition rise or fall rate ? t / ? v 01 0 ns / v v cc = 4.5 to 5.5 v operating free-air temperature t a ?40 85 c note: unused or floating inputs must be held high or low. if the input and output clamp-current ratings are symbol min max unit 1.65 5.5 v 05 . 5v 0v cc v 02 0 01 0 v 01 operating free-air temperature t a ?40 85 c note: unused or floating inputs must be held high or low.
hd74lvc1g53 rev.3.00 jul. 02, 2004 page 4 of 12 electrical characteristics ta = ?40 to 85c item symbol v cc (v) min typ max unit test condition 1.65 to 1.95 v cc 0.65 ? ? 2.3 to 2.7 v cc 0.7 ? ? 3.0 to 3.6 v cc 0.7 ? ? v ih 4.5 to 5.5 v cc 0.7 ? ? 1.65 to 1.95 ? ?v cc 0.35 2.3 to 2.7 ? ?v cc 0.3 3.0 to 3.6 ? ?v cc 0.3 input voltage v il 4.5 to 5.5 ? ?v cc 0.3 v 1.65 ? 13 30 i s = 4 ma 2.3 ? 10 20 i s = 8 ma 3.0 ? 8.5 17 i s = 24 ma on?state switch resistance r on 4.5 ? 6.5 13 i s = 32 ma v i =v cc or gnd 1.65 ? 86.5 120 i s = 4 ma 2.3 ? 23 30 i s = 8 ma 3.0 ? 13 20 i s = 24 ma peak on resistance r on (p) 4.5 ? 8 15 ? i s = 32 ma v i =v cc to gnd 1.65 ? ?7 i s = 4 ma 2.3 ? ?5 i s = 8 ma 3.0 ? ?3 i s = 24 ma difference of on-state resistance between switches ? r on 4.5 ? ?2 i s = 32 ma v i =v cc to gnd ? ? 1 . 0 off-state switch leakage current i s (off) 5.5 ? ? 0.1* 1 av i = v cc and v o = gnd or v i = gnd and v o = v cc , v a = v il , v ih ? ? 1 . 0 on-state switch leakage current i s (on) 5.5 ? ? 0.1* 1 av i = v cc or gnd, v a = v ih , v il v o = open ? ? 1 . 0 control input current i in 5.5 ? ? 0.1* 1 av in = v cc or gnd ? ?1 0 i cc 5.5 ? ? 1.0* 1 av in = v cc or gnd quiescent supply current ? i cc 5.5 ? ? 500 av c = v cc ?0.6 v control input capacitance c ic 5.0 ? 3.0 ? pf c i/o(off) 5.0 ? 6.0 ? switch terminal capacitance c i/o(on) 5.0 ? 13 ? pf note: 1. ta = 25c 13 20 i s = 24 ma 8 15 i s = 32 ma ?7 i s = 4 ma ?5 ?3 ?2 ? ? 1 . 0 ? ? 0.1* 1 ? ? ? ? 0.1* ? ? 5.5 ? ? 0.1* ? ?1 cc 5.5 5.5 ? 5.0 ?
hd74lvc1g53 rev.3.00 jul. 02, 2004 page 5 of 12 switching characteristics v cc = 1.8 0.15 v ta = ?40 to 85c item symbol min max unit test conditions from (input) to (output) propagation delay time* 1 t plh t phl ? 2.0 c l = 30 pf, r l = 1.0 k ? com or yn yn or com enable time t zh t zl 2.9 10.3 c l = 30 pf, r l = 1.0 k ? a yn disable time t hz t lz 2.1 9.4 ns c l = 30 pf, r l = 1.0 k ? a yn v cc = 2.5 0.2 v ta = ?40 to 85c item symbol min max unit test conditions from (input) to (output) propagation delay time* 1 t plh t phl ? 1.2 c l = 30 pf, r l = 500 ? com or yn yn or com enable time t zh t zl 2.1 7.2 c l = 30 pf, r l = 500 ? a yn disable time t hz t lz 1.4 7.9 ns c l = 30 pf, r l = 500 ? a yn v cc = 3.3 0.3 v ta = ?40 to 85c item ymbol min max unit test conditions from (input) to (output) propagation delay time* 1 t plh t phl ? 0.8 c l = 50 pf, r l = 500 ? com or yn yn or com enable time t zh t zl 1.9 5.8 c l = 50 pf, r l = 500 ? a yn disable time t hz t lz 1.1 7.2 ns c l = 50 pf, r l = 500 ? a yn v cc = 5.0 0.5 v ta = ?40 to 85c item symbol min max unit test conditions from (input) to (output) propagation delay time* 1 t plh t phl ? 0.6 c l = 50 pf, r l = 500 ? com or yn yn or com enable time t zh t zl 1.3 5.4 c l = 50 pf, r l = 500 ? a yn disable time t hz t lz 1.0 5.0 ns c l = 50 pf, r l = 500 ? a yn notes: 1. the propagation delay is calculated rc time const ant of typical on-state resist ance of the switch and the specified load capacitance, when driven by an i deal voltage source (zero output impedance). = 30 pf, r l = 500 unit test conditions 0.8 c l = 50 pf, r l = 500 c l = 50 pf, r l = 500 1.1 7.2 0.8 c ns 0.8 c c l = 50 pf, r ta = ?40 to 85c symbol min max unit test conditions plh t phl ? 0.6 c t zh t zl 1.3 5.4 t hz 1.0 5.0 notes: 1. the propagation delay is calculated rc time const specified load capacitance, when driven by an i
hd74lvc1g53 rev.3.00 jul. 02, 2004 page 6 of 12 analog switch characteristics ta = 25c item v cc (v) min typ max unit test conditions from (input) to (output) 1.65 ? 35 ? 2.3 ? 120 ? 3.0 ? 190 ? 4.5 ? 215 ? c l = 50 pf, r l = 600 ? 1.65 ? >300 ? 2.3 ? >300 ? 3.0 ? >300 ? frequency response (switch on) 4.5 ? >300 ? mhz c l = 5 pf, r l = 50 ? adjust fin voltage to obtain 0dbm at output when fin is 1mhz (sine wave). increase fin frequency until the db?meter reads ?3 dbm. 20 log(v o /v i ) = ?3 dbm com or y y or com 1.65 ? ?58 ? 2.3 ? ?58 ? 3.0 ? ?58 ? 4.5 ? ?58 ? c l = 50 pf, r l = 600 ? 1.65 ? ?42 ? 2.3 ? ?42 ? 3.0 ? ?42 ? crosstalk (between switches) 4.5 ? ?42 ? db c l = 5 pf, r l = 50 ? adjust fin voltage to obtain 0dbm at input when fin is 1mhz (sine wave). com y 1.65 ? 35 ? 2.3 ? 50 ? 3.0 ? 70 ? crosstalk (control input to signal output) 4.5 ? 100 ? mv c l = 50 pf, r l = 600 ? adjust rl value to obtain 0a at i in/out when fin is 1mhz (square wave) a y or com 1.65 ? ?58 ? 2.3 ? ?58 ? 3.0 ? ?58 ? 4.5 ? ?58 ? c l = 50 pf, r l = 600 ? 1.65 ? ?42 ? 2.3 ? ?42 ? 3.0 ? ?42 ? feed through attenuation (switch off) 4.5 ? ?42 ? db c l = 5 pf, r l = 50 ? adjust fin voltage to obtain 0dbm at input when fin is 1mhz (sine?wave) com or y y or com 1.65 ? 0.1 ? 2.3 ? 0.025 ? 3.0 ? 0.015 ? 4.5 ? 0.01 ? c l = 50 pf, r l = 10 k ? fin = 1khz (sine?wave) 1.65 ? 0.15 ? 2.3 ? 0.025 ? 3.0 ? 0.015 ? sine?wave distortion 4.5 ? 0.01 ? % c l = 50 pf, r l = 10 k ? fin = 10khz (sine?wave) v i =1.4v p?p , v cc =1.65v v i =2.0v p?p , v cc =2.3v v i =2.5v p?p , v cc =3.0v v i =4.0v p?p , v cc =4.5v com or y y or com operating characteristics ta = 25c item symbol v cc (v) min typ max unit test conditions 1.8 ? 9 ? 2.5 ? 10 ? 3.3 ? 10 ? power dissipation capacitance c pd 5.0 ? 12 ? pf f = 10 mhz adjust rl value to obtain 0a at i in/out when fin is 1mhz (square wave) l = 50 pf, r l = 600 ? 1.65 ? ?42 ? 2.3 ? ?42 ? 3.0 ? ?42 ? 4.5 ? ?42 ? c l = 5 pf, r l = 50 ? adjust fin voltage to obtain 0dbm at input when fin is 1mhz (sine?wave) 1.65 ? 0.1 ? 2.3 ? 0.025 ? 3.0 ? 0.015 ? 4.5 ? 0.01 ? c l = 50 pf, r l = 10 k fin = 1khz 1.65 ? 0.15 ? 2.3 ? 0.025 ? 3.0 ? 0.015 ? 4.5 ? 0.01 ? 4.5 ? 0.01 ? %
hd74lvc1g53 rev.3.00 jul. 02, 2004 page 7 of 12 test circuit v out v cc + ? v cc gnd (on) v v =v ih or v il a v =v ? r on in cc i s v in?out r = on i s (?) v in?out v cc v cc gnd (off) a v a = v il or v ih v a = v ih or v il v =v or gnd in cc v =gnd or v out cc v cc v cc gnd (on) a v =v or gnd in cc v open out ? i (off), i (on) ss v a = v a = v a ih or v il v =gnd or v out v =gnd out v =gnd cc or v cc or v v =v or gnd in v =v in v =v cc v =v cc v =v
hd74lvc1g53 rev.3.00 jul. 02, 2004 page 8 of 12 test circuit (cont.) open open test s1 vtt vtt s1 c l r l r l gnd gnd t / t plh phl t / t zh hz t / t zl lz 1.80.15 2.50.2 3.30.3 5.00.5 inputs v cc (v) v cc 2 v cc 2 v cc 2 v cc 2 v cc v cc / 2 v cc / 2 v cc / 2 v cc / 2 v cc v cc v cc v i v ref c l r l ?v vtt t r / t f 500 ? 0.15 v 0.15 v 0.3 v 0.3 v 500 ? 500 ? 1.0 k? load circuit from output 2 ns 2 ns 2.5 ns 2.5 ns 30 pf 30 pf 50 pf 50 pf v ref v ref v ref v ref v i 0 v t plh v t phl oh v ol input output v oh v ol control input v ref v ref v ref v oh ? ?v v ol + ?v v ref v i v oh 0 v v ol t hz t lz t zh t zl output (waveform ? a) output (waveform ? b) notes: 1. c l includes probe and jig capacitance. 2. waveform?a is for an output with internal conditions such that the output is low except when disabled by the output control. 3. waveform?b is for an output with internal conditions such that the output is high except when disabled by the output control. 4. all input pulses are supplied by generators having the following characteristics: prr 10mhz, zo = 50 ?. 5. the output are measured one at a time with one transition per measurement. v ref t phl v ref t zl v ref t zh
hd74lvc1g53 rev.3.00 jul. 02, 2004 page 9 of 12 frequency response (switch on) v cc v a = v ih or v il v a = v ih or v il 0.1 f v in v out v cc f in f = sine wave in gnd (on) c = 50 pf l r = 600 l ? r = 50 l ? v /2 cc crosstalk (between any switches) v cc 0.1 f v in y 0 y 1 v out1 v /2 cc v cc f in gnd com (on) c = 50 pf or 5 pf l r = 600 ? or 50 ? l r = 600 ? or 50 ? l r = 600 l ? r = 50 l ? v cc v out2 v /2 cc v cc gnd (off) c = 50 pf or 5 pf l or 50 ? or 5 pf or 50 ? v /2 cc v /2 cc v /2 y 1 c = 50 pf or 5 pf l c = 50 pf or 5 pf l c = 50 pf or 5 pf r = 600 ? or 50 ? l r = l r = v cc v cc v v cc v cc v gnd (off)
hd74lvc1g53 rev.3.00 jul. 02, 2004 page 10 of 12 feedthrough attenuation (switch off) v cc v a = v il or v ih v a = v ih or v il 0.1 f v in v out v /2 cc v cc f in gnd (off) c = 50 pf or 5 pf l r = 600 l ? ? v /2 cc r = 600 l ? r = 50 l ? 600 ? crosstalk (control input to signal output) v out v /2 cc c = 50 pf l r = 600 l ? v /2 cc r = 600 l ? v cc v a v cc gnd com com com y 0 y 1 y 0 or y 1 y 0 y 1 r = 50 l ? sine-wave distortion v cc 10 f v in v out v /2 cc v cc f in gnd 10 f (on) c = 50 pf l r = 10 k l ? or 50 ? or 50 or v il v out v /2 cc v /2 cc v /2 c = 50 pf or 5 pf l c = 50 pf or 5 pf l c = 50 pf or 5 pf r = 600 l r = l r = ? ? 600 ? com y 0 y v cc v cc v 10 f v in v in v v cc v cc v gnd (on) or 50
hd74lvc1g53 rev.3.00 jul. 02, 2004 page 11 of 12 package dimensions tbs-6v eiaj package code jedec code mass (g) lead material 0.001 ?? ? symbol dimension in millimeters min typ max a 0.50 0.15 0.35 0.05 0.05 0.20 0.19 0.90 1.40 0.50 0.20 0.20 0.15 0.17 0.10 a 1 a 2 b d e e x y 1 y zd ze e e d zd ze e a1 a2 a c b a 12 pin #1 index area c c b seating plane 6 b c x m a b c x m y 1 // c y c symbol b c x m a b c x m
hd74lvc1g53 rev.3.00 jul. 02, 2004 page 12 of 12 tbs-6av eiaj package code jedec code mass (g) lead material 0.001 ?? ?
keep safety first in your circuit designs! 1. renesas technology corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage. remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. notes regarding these materials 1. these materials are intended as a reference to assist our customers in the selection of the renesas technology corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to renesas technology corp. or a third party. 2. renesas technology corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by renesas technology corp. without notice due to product improvements or other reasons. it is therefore recommended that customers contact renesas technology corp. or an authorized renesas technology corp. product distributor for the latest product information before purchasing a product listed herein. the information described here may contain technical inaccuracies or typographical errors. renesas technology corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. please also pay attention to information published by renesas technology corp. by various means, including the renesas technology corp. semiconductor home page (http://www.renesas.com). 4. when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. renesas technology corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. renesas technology corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. please contact renesas technology corp. or an authorized renesas technology corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. the prior written approval of renesas technology corp. is necessary to reprint or reproduce in whole or in part these materials. 7. if these products or technologies are subject to the japanese export control restrictions, they must be exported under a license from the japanese government and cannot be imported into a country other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan and/or the country of destination is prohibited. 8. please contact renesas technology corp. for further details on these materials or the products contained therein. sales strategic planning div. nippon bldg., 2-6-2, ohte-machi, chiyoda-ku, tokyo 100-0004, japan http://www.renesas.com renesas technology america, inc. 450 holger way, san jose, ca 95134-1368, u.s.a tel: <1> (408) 382-7500 fax: <1> (408) 382-7501 renesas technology europe limited. dukes meadow, millboard road, bourne end, buckinghamshire, sl8 5fh, united kingdom tel: <44> (1628) 585 100, fax: <44> (1628) 585 900 renesas technology europe gmbh dornacher str. 3, d-85622 feldkirchen, germany tel: <49> (89) 380 70 0, fax: <49> (89) 929 30 11 renesas technology hong kong ltd. 7/f., north tower, world finance centre, harbour city, canton road, hong kong tel: <852> 2265-6688, fax: <852> 2375-6836 renesas technology taiwan co., ltd. fl 10, #99, fu-hsing n. rd., taipei, taiwan tel: <886> (2) 2715-2888, fax: <886> (2) 2713-2999 renesas technology (shanghai) co., ltd. 26/f., ruijin building, no.205 maoming road (s), shanghai 200020, china tel: <86> (21) 6472-1001, fax: <86> (21) 6415-2952 renesas technology singapore pte. ltd. 1, harbour front avenue, #06-10, keppel bay tower, singapore 098632 tel: <65> 6213-0200, fax: <65> 6278-8001 renesas sales offices ? 2004. renesas technology corp., all rights reserved. printed in japan. colophon .1.0 1. these materials are intended as a reference to assist our customers in the selection of the renesas technology corp. product application; they do not convey any license under any intellectual property rights, or any other rights, belonging to renesas t 2. renesas technology corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating 3. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents i publication of these materials, and are subject to change by renesas technology corp. without notice due to product improvement therefore recommended that customers contact renesas technology corp. or an authorized renesas technology corp. product distrib renesas technology corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies o r errors. please also pay attention to information published by renesas technology corp. by various means, including the renesas techn ology corp. semiconductor 4. when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, a nd algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. renesas technology corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. renesas technology corp. semiconductors are not designed or manufactured for use in a device or system that is used under ci is potentially at stake. please contact renesas technology corp. or an authorized renesas technology corp. product distributor product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerosp 6. the prior written approval of renesas technology corp. is necessary to reprint or reproduce in whole or in part these materi 7. if these products or technologies are subject to the japanese export control restrictions, they must be exported under a lic cannot be imported into a country other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan and/or the country of destination is 8. please contact renesas technology corp. for further details on these materials or the products contained therein. 450 holger way, san jose, ca 95134-1368, u.s.a tel: <1> (408) 382-7500 fax: <1> (408) 382-7501 renesas technology europe limited. dukes meadow, millboard road, bourne end, buckinghamshire, sl8 5fh, united kingdom tel: <44> (1628) 585 100, fax: <44> (1628) 585 900 renesas technology europe gmbh dornacher str. 3, d-85622 feldkirchen, germany tel: <49> (89) 380 70 0, fax: <49> (89) 929 30 11 hong kong ltd. 7/f., north tower, world finance centre, harbour city, canton road, hong kong tel: <852> 2265-6688, fax: <852> 2375-6836

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